Signal Clock Synchronization
[Signal Processing Blocks]

Collaboration diagram for Signal Clock Synchronization:

Classes

class  gr_clock_recovery_mm_cc
 Mueller and Müller (M&M) based clock recovery block with complex input, complex output.

This implements the Mueller and Müller (M&M) discrete-time error-tracking synchronizer. The complex version here is based on: Modified Mueller and Muller clock recovery circuit Based: G. R. Danesfahani, T.G. Jeans, "Optimisation of modified Mueller and Muller algorithm," Electronics Letters, Vol. 31, no. 13, 22 June 1995, pp. 1032 - 1033. More...

class  gr_clock_recovery_mm_ff
 Mueller and Müller (M&M) based clock recovery block with float input, float output.

This implements the Mueller and Müller (M&M) discrete-time error-tracking synchronizer. More...

class  gr_costas_loop_cc
 Carrier tracking PLL for QPSK

input: complex; output: complex
The Costas loop can have two output streams: stream 1 is the baseband I and Q; stream 2 is the normalized frequency of the loop. More...

class  gr_dd_mpsk_sync_cc
 Decision directed M-PSK synchronous demod

This block performs joint carrier tracking and symbol timing recovery. More...

class  gr_pll_carriertracking_cc
 Implements a PLL which locks to the input frequency and outputs the input signal mixed with that carrier.

input: stream of complex; output: stream of complex. More...

class  gr_pll_freqdet_cf
 Implements a PLL which locks to the input frequency and outputs an estimate of that frequency. Useful for FM Demod.

input: stream of complex; output: stream of floats. More...

class  gr_pll_refout_cc
 Implements a PLL which locks to the input frequency and outputs a carrier

input: stream of complex; output: stream of complex. More...


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