PICRF675H
CONFIG (address:0x2007, mask:0x31FF)
FOSC -- Oscillator Selection bits
FOSC = LP 0x3FF8 LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
FOSC = XT 0x3FF9 XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
FOSC = HS 0x3FFA HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
FOSC = EC 0x3FFB EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN.
FOSC = INTRCIO 0x3FFC INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
FOSC = INTRCCLK 0x3FFD INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
FOSC = EXTRCIO 0x3FFE RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
FOSC = EXTRCCLK 0x3FFF RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
WDTE -- Watchdog Timer Enable bit
WDTE = OFF 0x3FF7 WDT disabled.
WDTE = ON 0x3FFF WDT enabled.
PWRTE -- Power-Up Timer Enable bit
PWRTE = ON 0x3FEF PWRT enabled.
PWRTE = OFF 0x3FFF PWRT disabled.
MCLRE -- GP3/MCLR pin function select
MCLRE = OFF 0x3FDF GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD.
MCLRE = ON 0x3FFF GP3/MCLR pin function is MCLR.
BOREN -- Brown-out Detect Enable bit
BOREN = OFF 0x3FBF BOD disabled.
BOREN = ON 0x3FFF BOD enabled.
CP -- Code Protection bit
CP = ON 0x3F7F Program Memory code protection is enabled.
CP = OFF 0x3FFF Program Memory code protection is disabled.
CPD -- Data Code Protection bit
CPD = ON 0x3EFF Data memory code protection is enabled.
CPD = OFF 0x3FFF Data memory code protection is disabled.

This page generated automatically by the device-help.pl program (2014-05-17 13:45:50 UTC) from the 8bit_device.info file (rev: 1.19) of mpasmx and from the gputils source package (rev: svn 1017). The mpasmx is included in the MPLAB X.